A semiconductor device including a memory cell array having a plurality of memory cells, each of which writing and reading can be performed, includes a plurality of word lines each connected in common to gates of a plurality of memory cell transistors. One of the word lines selected by a row decoder (X decoder) that decodes a row address is driven to an activation potential by a word driver to cause the memory cell transistors connected to the activated word line to be turned on (conductive). Then, data is read from or written to the memory cell connected to a column (bit line) selected by a column decoder that decodes a column address.
Recently, in the semiconductor device including such a memory cell array, it has become difficult to reduce a rise time of a selected word line from a low potential to the activation potential (high potential), due to an influence of an increase in the number of the cells connected to the word line, an increase in word line length, or the like. The increase in the number of the cells is caused by a higher integration density achieved by the dimension scaling down of the semiconductor processing. The increase in word line length is caused by a demand for chip size reduction.
Further, recently, there is adopted a memory cell array of a hierarchical word line structure including a plurality of word lines (sub word lines) for one main word line. In the case of the hierarchical word line structure, a main word line to which word lines (sub word lines) belong is activated, and a selected one out of the word lines that belong to the main word line is activated to an activation potential (high potential). Due to a time constant of wiring resistance and a load capacitance, a far end side of the word line rises to the activation potential (high potential) being delayed from a near end side of the word line. The delay of activation of the word line leads to a delay in a data amplification operation after the activation of the word line and an access time of read and write operation.
In Patent Document 1, for example, there is disclosed use of a boosted voltage higher than a power supply voltage for driving of a word line, as a High potential (activation potential) of the word line.
Patent Document 1
JP Patent Kokai Publication No. JP2002-170398A